用于波形数字化的JESD204B高速接口设计

郑墁煜; 曹平; 安琪

doi:10.11804/NuclPhysRev.34.04.745

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用于波形数字化的JESD204B高速接口设计

郑墁煜, 曹平, 安琪

文章导航 > 原子核物理评论 > 2017 > 34(4): 745-754

郑墁煜, 曹平, 安琪. 用于波形数字化的JESD204B高速接口设计[J]. 原子核物理评论, 2017, 34(4): 745-754. doi: 10.11804/NuclPhysRev.34.04.745

引用本文:

郑墁煜, 曹平, 安琪. 用于波形数字化的JESD204B高速接口设计[J]. 原子核物理评论, 2017, 34(4): 745-754. doi: 10.11804/NuclPhysRev.34.04.745

ZHENG Manyu, CAO Ping, AN Qi. Design of JESD204B High Speed Interface for Waveform Digitization[J]. Nuclear Physics Review, 2017, 34(4): 745-754. doi: 10.11804/NuclPhysRev.34.04.745

Citation:

ZHENG Manyu, CAO Ping, AN Qi. Design of JESD204B High Speed Interface for Waveform Digitization[J]. Nuclear Physics Review, 2017, 34(4): 745-754. doi: 10.11804/NuclPhysRev.34.04.745

用于波形数字化的JESD204B高速接口设计

doi: 10.11804/NuclPhysRev.34.04.745

郑墁煜^1,2,
曹平^1,2,,
安琪^1,2

1.
中国科学技术大学核探测与核电子学国家重点实验室, 合肥 230026;
2.
中国科学技术大学核科学技术学院, 合肥 230027

基金项目: 国家重点研发计划（2016YFA0401602）

详细信息

作者简介:
郑墁煜(1992-),男,广东揭阳人,硕士研究生,从事核电子学研究;E-mail:zhmy@mail.ustc.edu.cn

通讯作者: 曹平,E-mail:cping@ustc.edu.cn。

中图分类号: TL503.6

Design of JESD204B High Speed Interface for Waveform Digitization

ZHENG Manyu^1,2,
CAO Ping^{1,2
,},
AN Qi^1,2

1.
State Key Laboratory of Particle Detection and Electronics, University of Science and Technology of China, Hefei 230026;
2.
School of Nuclear Science and Technology, University of Science and Technology of China, Hefei 230026

Funds: National Key Research and Development Plan(2016YFA0401602)

摘要: 随着高速波形数字化技术在核与粒子物理实验中的广泛应用，其对于ADC速度和精度需求日益增大，从而使电子学系统的PCB布局布线更加复杂、成本更高。为了简化设计，降低成本，提出了用于波形数字化的JESD204B的高速接口设计方法，介绍了JESD204B接口的协议及需求，并提出了基于Altera FPGA和专用JESD204B时钟芯片LMK0482x的具体解决方案。测试结果表明，时钟性能优异且JESD204B链路功能正常，系统性能优异，该方法可以实现JESD204B高速接口设计，并应用于波形数字化技术。

At present, due to the wide application of nuclear and particle physics experiments in the waveform digitization technology and the increasing demand of high speed and high accuracy for ADC, the PCB layout is more and more complex and the cost is higher. In order to simplify the design and reduce the cost, this paper put forward the scheme of JESD204B high speed interface for the waveform digitization technology in nuclear and particle physics experiments. Firstly the interface protocol and the demand of JESD204B is introduced. Then the solution based on Altera FPGA and special JESD204B clock chip LMK0482x is proposed. The preliminary test results show that the clock performance is excellent and JESD204B link is functioning normally. Moreover, the system has an excellent performance. The scheme can realize the design of JESD204B high speed interface and therefore be applied to the waveform digitization technology.
- 波形数字化 /
- JESD204B /
- FPGA /
- ADC
Abstract: At present, due to the wide application of nuclear and particle physics experiments in the waveform digitization technology and the increasing demand of high speed and high accuracy for ADC, the PCB layout is more and more complex and the cost is higher. In order to simplify the design and reduce the cost, this paper put forward the scheme of JESD204B high speed interface for the waveform digitization technology in nuclear and particle physics experiments. Firstly the interface protocol and the demand of JESD204B is introduced. Then the solution based on Altera FPGA and special JESD204B clock chip LMK0482x is proposed. The preliminary test results show that the clock performance is excellent and JESD204B link is functioning normally. Moreover, the system has an excellent performance. The scheme can realize the design of JESD204B high speed interface and therefore be applied to the waveform digitization technology.
- waveform digitization /
- JESD204B /
- FPGA /
- ADC

[1]	JONATHAN H. China Electronic Market, 2016(6):39. (in Chinese) (JONATHAN H. 中国电子商情:基础电子, 2016(6):39.)
[2]	ANTHONY D, MICHAEL G. Electronic Products, 2013(6):31. (in Chinese) (ANTHONY D, MICHAEL G. 今日电子, 2013(6):31.)
[3]	CHEN Andy. The Needs and Implementation for JESD204B Serial Interface Clock[R]. TI reports, 2014.01. http://www.ti.com.cn/cn/lit/an/zhca591/zhca591.pdf)
[4]	LI Peixian, GUAN Mengyun, YANG Changgen, et al. Chinese Physics C, 2016(11):133.
[5]	Analog Devices, "12-Bit, 1 GSPS/500 MSPS JESD204B, Dual Analog-to-Digital Converter," AD9234 datasheet, 2017.02.http://www.analog.com/media/en/technicaldocumentation/data-sheets/AD9234.pdf.
[6]	JONATHAN H. China Electronic Market, 2016(6):39. (in Chinese) (JONATHAN H. 中国电子商情:基础电子, 2014(10):39.)
[7]	JONATHAN H. China Electronic Market, 2016(6):39. (in Chinese) (JONATHAN H. 中国电子商情:基础电子, 2013(9):36.)
[8]	ZHOU Dianmiao, XU Hui, CHEN Weihua, et al. Electronic Science and Technology, 2015, 28(10):53. (in Chinese) (周典淼, 徐晖, 陈维华, 等. 电子科技, 2015, 28(10):53.)
[9]	JEDEC Standard JESD204B (July 2011). JEDEC Solid State Technology Association. www.jedec.org/sites/default/files/docs/JESD204B.pdf.
[10]	JESD204B IP Core User Guide (2016.10). Altera Corporation. https://www.altera.com/content/dam/altera-www/global/enUS/pdfs/literature/ug/ugjesd204b.pdf.

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用于波形数字化的JESD204B高速接口设计

doi: 10.11804/NuclPhysRev.34.04.745

1. 中国科学技术大学核探测与核电子学国家重点实验室, 合肥 230026;

2. 中国科学技术大学核科学技术学院, 合肥 230027

基金项目: 国家重点研发计划（2016YFA0401602）

作者简介:
郑墁煜(1992-),男,广东揭阳人,硕士研究生,从事核电子学研究;E-mail:zhmy@mail.ustc.edu.cn

通讯作者: 曹平,E-mail:cping@ustc.edu.cn。

收稿日期: 2017-03-07
修回日期: 2017-03-23
刊出日期: 2017-12-20

中图分类号: TL503.6

关键词:

波形数字化 /

JESD204B /

FPGA /

ADC

摘要: 随着高速波形数字化技术在核与粒子物理实验中的广泛应用，其对于ADC速度和精度需求日益增大，从而使电子学系统的PCB布局布线更加复杂、成本更高。为了简化设计，降低成本，提出了用于波形数字化的JESD204B的高速接口设计方法，介绍了JESD204B接口的协议及需求，并提出了基于Altera FPGA和专用JESD204B时钟芯片LMK0482x的具体解决方案。测试结果表明，时钟性能优异且JESD204B链路功能正常，系统性能优异，该方法可以实现JESD204B高速接口设计，并应用于波形数字化技术。

At present, due to the wide application of nuclear and particle physics experiments in the waveform digitization technology and the increasing demand of high speed and high accuracy for ADC, the PCB layout is more and more complex and the cost is higher. In order to simplify the design and reduce the cost, this paper put forward the scheme of JESD204B high speed interface for the waveform digitization technology in nuclear and particle physics experiments. Firstly the interface protocol and the demand of JESD204B is introduced. Then the solution based on Altera FPGA and special JESD204B clock chip LMK0482x is proposed. The preliminary test results show that the clock performance is excellent and JESD204B link is functioning normally. Moreover, the system has an excellent performance. The scheme can realize the design of JESD204B high speed interface and therefore be applied to the waveform digitization technology.

English Abstract

郑墁煜, 曹平, 安琪. 用于波形数字化的JESD204B高速接口设计[J]. 原子核物理评论, 2017, 34(4): 745-754. doi: 10.11804/NuclPhysRev.34.04.745

引用本文:

郑墁煜, 曹平, 安琪. 用于波形数字化的JESD204B高速接口设计[J]. 原子核物理评论, 2017, 34(4): 745-754. doi: 10.11804/NuclPhysRev.34.04.745

ZHENG Manyu, CAO Ping, AN Qi. Design of JESD204B High Speed Interface for Waveform Digitization[J]. Nuclear Physics Review, 2017, 34(4): 745-754. doi: 10.11804/NuclPhysRev.34.04.745

Citation:

ZHENG Manyu, CAO Ping, AN Qi. Design of JESD204B High Speed Interface for Waveform Digitization[J]. Nuclear Physics Review, 2017, 34(4): 745-754. doi: 10.11804/NuclPhysRev.34.04.745

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用于波形数字化的JESD204B高速接口设计

doi: 10.11804/NuclPhysRev.34.04.745

作者简介:
郑墁煜(1992-),男,广东揭阳人,硕士研究生,从事核电子学研究;E-mail:zhmy@mail.ustc.edu.cn

通讯作者: 曹平,E-mail:cping@ustc.edu.cn。

Design of JESD204B High Speed Interface for Waveform Digitization

计量

用于波形数字化的JESD204B高速接口设计

doi: 10.11804/NuclPhysRev.34.04.745

1. 中国科学技术大学核探测与核电子学国家重点实验室, 合肥 230026;

2. 中国科学技术大学核科学技术学院, 合肥 230027

作者简介:
郑墁煜(1992-),男,广东揭阳人,硕士研究生,从事核电子学研究;E-mail:zhmy@mail.ustc.edu.cn

通讯作者: 曹平,E-mail:cping@ustc.edu.cn。

English Abstract

Design of JESD204B High Speed Interface for Waveform Digitization

1. State Key Laboratory of Particle Detection and Electronics, University of Science and Technology of China, Hefei 230026;

2. School of Nuclear Science and Technology, University of Science and Technology of China, Hefei 230026

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留言板

用于波形数字化的JESD204B高速接口设计

doi: 10.11804/NuclPhysRev.34.04.745

作者简介: 郑墁煜(1992-),男,广东揭阳人,硕士研究生,从事核电子学研究;E-mail:zhmy@mail.ustc.edu.cn

通讯作者: 曹平,E-mail:cping@ustc.edu.cn。

Design of JESD204B High Speed Interface for Waveform Digitization

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出版历程

用于波形数字化的JESD204B高速接口设计

doi: 10.11804/NuclPhysRev.34.04.745

1. 中国科学技术大学核探测与核电子学国家重点实验室, 合肥 230026; 2. 中国科学技术大学核科学技术学院, 合肥 230027

作者简介: 郑墁煜(1992-),男,广东揭阳人,硕士研究生,从事核电子学研究;E-mail:zhmy@mail.ustc.edu.cn

通讯作者: 曹平,E-mail:cping@ustc.edu.cn。

English Abstract

Design of JESD204B High Speed Interface for Waveform Digitization

1. State Key Laboratory of Particle Detection and Electronics, University of Science and Technology of China, Hefei 230026; 2. School of Nuclear Science and Technology, University of Science and Technology of China, Hefei 230026

全文HTML

目录

作者简介:
郑墁煜(1992-),男,广东揭阳人,硕士研究生,从事核电子学研究;E-mail:zhmy@mail.ustc.edu.cn

1. 中国科学技术大学核探测与核电子学国家重点实验室, 合肥 230026;

2. 中国科学技术大学核科学技术学院, 合肥 230027

作者简介:
郑墁煜(1992-),男,广东揭阳人,硕士研究生,从事核电子学研究;E-mail:zhmy@mail.ustc.edu.cn

1. State Key Laboratory of Particle Detection and Electronics, University of Science and Technology of China, Hefei 230026;

2. School of Nuclear Science and Technology, University of Science and Technology of China, Hefei 230026