[1] |
王伟涛. 8b/10b架构SerDes芯片的设计与实现[D]. 成都: 电子科技大学, 2016(5): 5. |
WANG Weitao. Design and Implementation of SERDES Chip Based on 8b/10b Architecture[D]. Chengdu:University of Electronic Science and Technology of China, 2016(5): 5. (in Chinese) |
[2] |
XIAO L, LI X, GONG D, et al. Journal of Instrumentation, 2016, 11: C02013. |
[3] |
MOREIRA P, BARON S, BONACINI S, et al. Journal of Instrumentation, 2010, 5: C11022. |
[4] |
GUETTOUCHE N, BARON S, BIEREIGEL S, et al. Journal of Instrumentation, 2022, 17: C03040(17). |
[5] |
ZHANG L, CRUDA E M, CHAO C P, et al. Journal of Instrumentation, 2020, 17: C03011. |
[6] |
张健忠, 常昌远. 电子与封装, 2007, 7(10): 33. |
ZHANG Jianzhong, CHANG Changyuan. Electronics & Packaging, 2007, 7(10): 33. (in Chinese) |
[7] |
刘玮, 肖磊, 杨莲兴. 固体电子学研究与进展, 2009, 29(1): 100. |
LIU Wei, XIAO Lei, YANG Lianxing. Reseerch & Progress of SSE, 2009, 29(1): 100. (in Chinese) |
[8] |
韦龙飞. 多速率SerDes发送模块芯片设计与验证[D]. 成都: 电子科技大学, 2013(6): 15. |
WEI Longfei. Design and Verification of a Multi-rate Serdes Transmitter[D]. Chengdu:University of Electronic Science and Technology of China, 2013(6): 15. (in Chinese) |
[9] |
FUKAISHI M, NAKAMURA K, HEIUCHI H, et al. IEEE Journal of Solid-State Circuits, 2000, 35(11): 1611. |
[10] |
孟辰星, 黄光明, 郭迪. 电子与封装, 2020, 20(2): 020303. |
MENG Chenxing, HUANG Guangming, GUO Di. Electronics & Packaging, 2020, 20(2): 020303. (in Chinese) |
[11] |
伍得阳. 低抖动时钟占空比校准电路的研究与设计[D]. 上海: 复旦大学, 2013(4): 1. |
WU Deyang. Research and Design of Low Jitter Clock Duty Cycle Calibration Circuit[D]. Shanghai:Fudan University, 2013(4): 1. (in Chinese) |