10 bit 20 MSPS流水线型ADC芯片测试

杜天亮; 千奕; 佘乾顺; 蒲天磊; 赵红赟; 孔洁; 杨鸣宇; 孙志坤; 孙志朋; 颜俊伟; 许佳鹏

doi:10.11804/NuclPhysRev.40.2023002

10 bit 20 MSPS流水线型ADC芯片测试

Testing of a 10 bit 20 MSPS Pipeline ADC

摘要

摘要: 针对塑料闪烁体阵列探测器(Plastic Scintillation Detector, PSD)低功耗、数字化的读出需求，研制了一款多通道10 bit 20 MSPS流水线型模数变换器(Analog-to-Digital Converter, ADC) 芯片。为了评估该ADC芯片的性能参数，需要对其进行系统化的测试。首先研制了一套测试系统，包括电路的硬件设计、FPGA固件和分析程序的设计，然后依据IEEE 标准对ADC芯片进行了系统化的测试与分析。测试结果表明，输入信号在基带范围内，ADC芯片测试参数达到了预期指标，有效位数 (Effective Number of Bit, ENOB)接近于8.0 bit，积分非线性(\rmINL) = 0.75 LSB，微分非线性(\rmDNL) = 1.09 LSB，为后续ADC芯片的优化设计和参数提升提供了有力的支持。

Abstract: For the low power and digital readout requirements of plastic scintillation detector(PSD), a multi-channel 10 bit 20 MSPS Pipeline Analog-to-Digital Converter(ADC) chip is developed. In order to evaluate the performance of the ADC chip, a systematic test is needed. In the work of this paper, a test system is developed, which included the hardware design of the circuits, the design of the FPGA firmware and the analysis programme. The ADC chip was systematically tested and analysed according to IEEE standards.The test results indicate that, when the input signal frequency is in baseband range, the performance of the ADC chip meets the design requirements, and the Effective Number of Bit(ENOB) is close to 8.0 bit. The Integral nonlinearity(INL) is 0.75 LSB, and the differential nonlinearity(DNL) is 1.09 LSB, which provides strong support for future optimization design and parameter improvement of the ADC chips.

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